Field of the Invention
The invention relates to a semiconductor component and a method for testing and operating a semiconductor component, which has an electronic circuit which is formed on a main surface of a semiconductor chip, and has connecting surfaces ("pads"), which are arranged on the main surface of the semiconductor chip and are electrically coupled to the electronic circuit, for electrical communication between the circuit and the outside world, the electronic circuit on the one hand being operable in a test mode, which can normally be carried out in the wafer composite of the semiconductor chips and in which an externally supplied test signal is applied to a predetermined pad, and on the other hand being operable in an operating mode in which operating signals are applied to the pads and/or to terminal pins which are electrically coupled to the pads and are connected to the outside of the component.
As an example of such a semiconductor component, a synchronous dynamic semiconductor memory (SDRAM) has become known, for example, from Y. Takai et al., "250 Mbyte/s Synchronous DPAM Using a 3-Stage-Pipeline Architecture," IEEE Journal of Solid-State Circuits, Vol. 29, April 1994, p. 526; Yuno Choy et al., "16-Mb Synchronous DRAM with 125-Mbyte/s Data Rate," IEEE Journal of Solid-State Circuits, Vol. 29, April 1994, p. 529. According to JEDEC Standard No. 21-C, such SDRAM semiconductor memories are available in so-called TSOP-2 housings with, typically, 50 external terminal pins (1 M.times.16 SDRAM, 1 M.times.18 SDRAM, 256 k.times.16 SDRAM) or 54 terminal pins (16 M.times.4 SDRAM, 8 M.times.8 SDRAM, 4 M.times.16 SDRAM). Metallic pads are formed predominantly in an edge region on the main surface of the semiconductor chip. The pads are used for electrical communication between the circuit components that are formed on the semiconductor chip and the outside world, and typically have a square shape with dimensions of several .mu.m.times..mu.m. During installation in the semiconductor component housing, some of these pads are connected, for example via bonding wires, to the terminal pins which project to the exterior. After installation of the semiconductor component in the housing, a relatively small number of the pads are no longer accessible from the exterior. They are required only in the test mode, in which the semiconductor chips, not yet in their housing, are still in the wafer composite.
FIG. 2 shows schematically those components of a conventional synchronous dynamic semiconductor memory SDRAM which are required to explain the problem on which the invention is based. The illustration shows the pads 1 and 2 which are assigned to the two DQM terminals LDQM (lower input mask/output enable) and UDQM (upper input mask/output enable) of the SDRAM. The pads are metallic pads, essentially having a square shape. They are disposed on the main surface of the semiconductor chip and are electrically connected via lines 3, 4 and via drivers 5, 6 to the control and logic circuit arranged in the semiconductor chip (indicated in FIG. 2 by the designations LDQM internal and UDQM internal). Furthermore, a test pad 7 is provided, which is required for test purposes, and to which a test activation signal EXTADDR is applied externally in the test mode. The actual test mode sequences in the form of so-called IPL codes (which are used, inter alia, to test to a greater extent the functionality of the redundant and non-redundant bit lines when the word line and the like are open of the semiconductor memory which is still located in the wafer composite, that is to say has not yet been canned) are supplied from a control circuit 9 in the form of a signal TMEXTADDR. The signal TMEXTADDR is applied to one input of an AND gate 10, at whose output a signal Ax is output. The output signal Ax is used to test the relevant circuit parts. The test mode is activated by the test activation signal EXTADDR which is applied externally to the test pad 7, is applied via a driver 8 to the second input of the AND gate 10, and controls the control circuit 9, and thus the emitted test mode sequences, in the sense of switching them on and off. The metallic test pad 7 which is formed on the main surface of the semiconductor chip is thus required only for test purposes, and is actually no longer required subsequently.